US 11,967,269 B2
Scan driver
Chul Kyu Kang, Yongin-si (KR); Sung Hwan Kim, Yongin-si (KR); Soo Hee Oh, Yongin-si (KR); Dong Sun Lee, Yongin-si (KR); and Sang Moo Choi, Yongin-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Oct. 4, 2022, as Appl. No. 17/938,031.
Application 17/938,031 is a continuation of application No. 17/339,808, filed on Jun. 4, 2021, granted, now 11,468,826.
Application 17/339,808 is a continuation of application No. 16/697,690, filed on Nov. 27, 2019, granted, now 11,030,943, issued on Jun. 8, 2021.
Claims priority of application No. 10-2018-0152855 (KR), filed on Nov. 30, 2018.
Prior Publication US 2023/0022857 A1, Jan. 26, 2023
Int. Cl. G06F 3/01 (2006.01); G09G 3/32 (2016.01)
CPC G09G 3/32 (2013.01) [G09G 2310/0267 (2013.01); G09G 2310/08 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A scan stage comprising:
a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node;
a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node;
a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line;
a fourth transistor having a first electrode, a second electrode, and a gate electrode, the second electrode and the gate electrode coupled to a second input scan line; and
fifth transistor having a first electrode coupled to the second node, a second electrode coupled to the first electrode of the fourth transistor, and a gate electrode coupled to a control line,
wherein the first input scan line and the second input scan line are different from each other.