US 11,966,727 B2
Load module compiler
Jan Jaeger, Ruschlikon (CH); and Thomas D. Grieve, Romsey (GB)
Assigned to LzLabs GmbH, Zurich (CH)
Filed by LzLabs GmbH, Wallisellen (CH)
Filed on May 26, 2022, as Appl. No. 17/825,990.
Application 17/825,990 is a continuation of application No. 16/920,998, filed on Jul. 6, 2020, granted, now 11,354,103.
Application 16/920,998 is a continuation of application No. 16/121,170, filed on Sep. 4, 2018, granted, now 10,713,024, issued on Jul. 14, 2020.
Application 16/121,170 is a continuation of application No. PCT/IB2016/051415, filed on Mar. 11, 2016.
Prior Publication US 2023/0100192 A1, Mar. 30, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 8/53 (2018.01); G06F 8/41 (2018.01); G06F 8/52 (2018.01); G06F 8/76 (2018.01)
CPC G06F 8/53 (2013.01) [G06F 8/447 (2013.01); G06F 8/47 (2013.01); G06F 8/52 (2013.01); G06F 8/76 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A computer implemented method for executing a first program compiled for a source architecture on a machine having a target architecture different from the source architecture, the method comprising:
receiving by a processor said first program comprising first executable code compiled to execute on a source architecture, the processor being of the source architecture or the target architecture;
decompiling a load module of the first program into intermediate computer code formatted according to an intermediate code format;
identifying a set of addresses that are exposed for external reference by a second program compiled to execute on the source architecture;
storing in a computer memory an index of said set of addresses that are exposed for external reference, wherein the index comprises values that correspond to invalid addresses in the target architecture;
recompiling the intermediate computer code into target executable code configured for the target architecture;
incorporating the index of said set of addresses into the target executable code; and
executing said target executable code on a processor having said different target architecture, wherein said executing generates at least one invalid address and said invalid address is translated into a valid address using the incorporated index in the target executable code;
wherein the identifying the set of addresses that are exposed for external reference comprises, in a first pass, examining syntax of instructions in machine code of said first program, determining from the syntax of the instructions that a set of symbols are addresses, and adding the symbols to the index.