US 11,966,621 B2
Non-volatile storage system with program execution decoupled from dataload
Hua-Ling Cynthia Hsu, Fremont, CA (US); and Aaron Lee, Sunnyvale, CA (US)
Assigned to SanDisk Technologies LLC, Addison, TX (US)
Filed by SanDisk Technologies LLC, Addison, TX (US)
Filed on Feb. 17, 2022, as Appl. No. 17/674,543.
Prior Publication US 2023/0259300 A1, Aug. 17, 2023
Int. Cl. G06F 3/06 (2006.01); G06F 12/02 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01); G06F 12/0246 (2013.01); G06F 2212/7203 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a plurality of semiconductor dies, wherein each semiconductor die is configured to connect to a respective memory structure having non-volatile memory cells and to program data into the non-volatile memory cells in the respective memory structure, wherein each semiconductor die is configured to access commands and data from a common memory bus;
wherein a first semiconductor die of the plurality of semiconductor dies comprises one or more control circuits configured to:
load data from the memory bus into temporary storage on the first semiconductor die, wherein the data is to be programmed by the first semiconductor die for a program operation into non-volatile memory cells;
access a first type of program execution command for the program operation from the memory bus after loading the data into the temporary storage;
operate in a first mode responsive to a first signal from a memory controller in which dataload and program execution are decoupled, including:
enter a wait state in response to accessing the first type of program execution command to decouple loading the data into the temporary storage from programming the data into the non-volatile memory cells when in the first mode that decouples dataload from program execution;
access a second type of program execution command for the program operation from the memory bus while in the wait state and in the first mode;
program the data from the temporary storage into the non-volatile memory cells in response to accessing the second type of program execution command while in the first mode;
operate in a second mode responsive to a second signal from the memory controller in which dataload and program execution are coupled, wherein in the second mode the first semiconductor die does not enter the wait state in response to accessing the first type of program execution command after loading data into the temporary storage but instead immediately programs the data from the temporary storage into the non-volatile memory cells.