US 11,966,348 B2
Reducing coupling and power noise on PAM-4 I/O interface
Donghyuk Lee, Cedar Park, TX (US); and James Michael O'Connor, Austin, TX (US)
Assigned to NVIDIA Corp., Santa Clara, CA (US)
Filed by NVIDIA Corp.
Filed on Jan. 28, 2019, as Appl. No. 15/929,094.
Prior Publication US 2020/0242062 A1, Jul. 30, 2020
Int. Cl. G06F 13/12 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/4009 (2013.01) [G06F 13/4045 (2013.01); G06F 13/4282 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method of driving a serial data bus with voltage signals corresponding to a series of data bits, the method comprising:
dividing the series of data bits into sequences of a number of bits, the number of bits based on a number of voltage levels, N, utilized in a PAM-N symbol;
encoding a first number of bits of each of the sequences onto the serial data bus as one of N discrete voltage levels (an N-level symbol), the first number of bits being the base-2 logarithm of N;
encoding a next number of bits of each of the sequences onto the data bus each as one of M discrete voltage levels (two M-level symbols), the next number of bits being log 2 [(N2)/2] and M being an integer equal to a ceiling function applied to a square root of [(N2)/2]; and
communicating the N-level symbol and the two M-level symbols on the serial data bus.