US 11,955,728 B2
Differential on-chip loop antenna
Nir Weisman, Hod Hasharon M (IL); Omer Asaf, Oranit M (IL); and Eyal Goldberger, Moshav Beherotaim M (IL)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jul. 20, 2021, as Appl. No. 17/381,073.
Application 17/381,073 is a continuation of application No. 15/716,930, filed on Sep. 27, 2017, granted, now 11,108,156.
Prior Publication US 2021/0351511 A1, Nov. 11, 2021
Int. Cl. H01Q 7/00 (2006.01); H01L 23/552 (2006.01); H01L 23/66 (2006.01); H01Q 1/22 (2006.01); H01Q 5/371 (2015.01); H01Q 21/06 (2006.01); H01Q 25/00 (2006.01)
CPC H01Q 7/00 (2013.01) [H01L 23/552 (2013.01); H01L 23/66 (2013.01); H01Q 1/2283 (2013.01); H01Q 5/371 (2015.01); H01Q 21/06 (2013.01); H01Q 25/001 (2013.01); H01L 2223/6677 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit (IC) die, comprising:
metal loops substantially centered around a core region of the IC die;
a dielectric between spaces of the metal loops;
an electric circuit in the core region electrically coupled to the metal loops with an interconnect; and
a ground plane in a metallization stack of the IC die,
wherein:
the metal loops are in the metallization stack,
the ground plane is electrically coupled to the metal loops with a first plurality of vias,
the ground plane is electrically coupled to the electric circuit with a second plurality of vias,
the electric circuit includes an inductor,
the metal loops constitute a loop antenna,
exciting the metal loops in a first direction causes electric currents in the metal loops to cancel each other, and
exciting the metal loops in a second direction perpendicular to the first direction causes electric currents in the metal loops to aggregate.