CPC H04L 1/0069 (2013.01) [H04L 1/1896 (2013.01)] | 17 Claims |
1. An apparatus, comprising:
one or more processors;
a non-transitory memory storing a program, which when executed by the one or more processors, cause the one or more processors to perform operations, the operations comprising:
performing rate matching to determine a first bit sequence;
determining a first symbol sequence based on the first bit sequence;
determining to-be-mapped symbols in the first symbol sequence; and
mapping the to-be-mapped symbols to a first resource, and sending the to-be-mapped symbols to a receiving node, wherein the apparatus, operating as a part of a first node, communicates with the receiving node using a first subset of the first resource based on the mapping, wherein the receiving node communicates with a second node using a second subset of the first resource based on mapping determined by the second node, and wherein the first subset of the first resource and the second subset of the first resource are partially overlapping, wherein mapping the to-be-mapped symbols to the first resource, and sending the to-be-mapped symbols, comprises:
performing indexing for a second resource, mapping the to-be-mapped symbols to the first resource, and sending the to-be-mapped symbols.
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