US 11,943,916 B2
Semiconductor device including dummy pillar and electronic system
Seongjae Go, Suwon-si (KR); and Jongsoo Kim, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Apr. 16, 2021, as Appl. No. 17/232,763.
Claims priority of application No. 10-2020-0146048 (KR), filed on Nov. 4, 2020.
Prior Publication US 2022/0139943 A1, May 5, 2022
Int. Cl. H10B 41/27 (2023.01); H01L 23/528 (2006.01); H10B 41/10 (2023.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01)
CPC H10B 41/27 (2023.02) [H01L 23/5283 (2013.01); H10B 41/10 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a stack structure comprising a plurality of mold layers and a plurality of horizontal conductive layers, which are alternately stacked;
a channel structure vertically extending in the stack structure;
a pillar structure vertically extending in the stack structure; and
a plurality of contact plugs, each being connected to a corresponding one of the plurality of horizontal conductive layers,
wherein each of the plurality of horizontal conductive layers comprises a gate electrode, and a connecting pad in continuity with the gate electrode,
wherein the pillar structure comprises a pillar extending through the plurality of horizontal conductive layers, and a plurality of pillar extensions protruding from a side surface of the pillar,
wherein the plurality of the pillar extensions comprise an uppermost extension and other pillar extensions,
wherein outer side surfaces of the other pillar extensions further protrude beyond an outer side surface of the uppermost pillar extension,
wherein each of the plurality of pillar extensions is horizontally aligned with a corresponding one of the plurality of horizontal conductive layers,
wherein the channel structure vertically extends through a plurality of gate electrodes of the plurality of horizontal conductive layers, and
wherein each of the plurality of contact plugs contacts a connecting pad of a corresponding one of the plurality of horizontal conductive layers.