US 11,943,752 B2
Receiving apparatus and method thereof
Akihiko Nishio, Osaka (JP); Christian Wengerter, Kleinheubach (DE); Hidetoshi Suzuki, Kanagawa (JP); and Masaru Fukuoka, Ishikawa (JP)
Assigned to Panasonic Holdings Corporation, Osaka (JP)
Filed by Panasonic Holdings Corporation, Osaka (JP)
Filed on Aug. 2, 2022, as Appl. No. 17/879,681.
Application 17/879,681 is a continuation of application No. 17/166,851, filed on Feb. 3, 2021, granted, now 11,438,891.
Application 17/166,851 is a continuation of application No. 16/681,496, filed on Nov. 12, 2019, granted, now 10,952,211, issued on Mar. 16, 2021.
Application 16/681,496 is a continuation of application No. 15/946,489, filed on Apr. 5, 2018, granted, now 10,512,081, issued on Dec. 17, 2019.
Application 15/946,489 is a continuation of application No. 15/451,099, filed on Mar. 6, 2017, granted, now 9,967,879, issued on May 8, 2018.
Application 15/451,099 is a continuation of application No. 14/920,444, filed on Oct. 22, 2015, granted, now 9,629,163, issued on Apr. 18, 2017.
Application 14/920,444 is a continuation of application No. 14/250,101, filed on Apr. 10, 2014, granted, now 9,204,444, issued on Dec. 1, 2015.
Application 14/250,101 is a continuation of application No. 13/919,753, filed on Jun. 17, 2013, granted, now 9,019,925, issued on Apr. 28, 2015.
Application 13/919,753 is a continuation of application No. 13/308,118, filed on Nov. 30, 2011, granted, now 8,509,141, issued on Aug. 13, 2013.
Application 13/308,118 is a continuation of application No. 13/184,382, filed on Jul. 15, 2011, granted, now 8,204,017, issued on Jun. 19, 2012.
Application 13/184,382 is a continuation of application No. 12/846,447, filed on Jul. 29, 2010, granted, now 8,040,832, issued on Oct. 18, 2011.
Application 12/846,447 is a continuation of application No. 12/593,899, granted, now 7,852,807, issued on Dec. 14, 2010, previously published as PCT/JP2008/001569, filed on Jun. 18, 2008.
Claims priority of application No. 2007-161958 (JP), filed on Jun. 19, 2007; application No. 2007-211545 (JP), filed on Aug. 14, 2007; and application No. 2008-056561 (JP), filed on Mar. 6, 2008.
Prior Publication US 2022/0377736 A1, Nov. 24, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H04W 72/04 (2023.01); H04B 7/12 (2006.01); H04L 1/00 (2006.01); H04L 5/00 (2006.01); H04W 72/0446 (2023.01); H04W 72/0453 (2023.01)
CPC H04W 72/0446 (2013.01) [H04B 7/12 (2013.01); H04L 1/0003 (2013.01); H04L 1/0009 (2013.01); H04L 1/0071 (2013.01); H04L 5/0007 (2013.01); H04L 5/0028 (2013.01); H04L 5/0039 (2013.01); H04L 5/0041 (2013.01); H04L 5/0092 (2013.01); H04W 72/0453 (2013.01); H04L 5/006 (2013.01); H04L 5/0064 (2013.01); H04L 5/0085 (2013.01)] 16 Claims
OG exemplary drawing
 
1. An integrated circuit to control a process, the process comprising:
receiving allocation information indicating Distributed Virtual Resource Blocks (DVRBs) with consecutive DVRB numbers, the DVRBs with the consecutive DVRB numbers being mapped to Physical Resource Blocks (PRBs), a difference between DVRB numbers of two DVRBs that are mapped to PRBs in a same frequency within a subframe being less than or equal to two, and two DVRBs with consecutive DVRB numbers being mapped to two PRBs that are inconsecutive in a frequency domain; and
decoding data based on the allocation information.