US 11,943,571 B2
Optical switch with all-optical memory buffer
Yosef Ben-Ezra, Petach Tikva (IL); and Yaniv Ben-Haim, Petach Tikva (IL)
Assigned to NEWPHOTONICS Ltd., Petach Tikva (IL)
Appl. No. 17/922,005
Filed by NEWPHOTONICS Ltd., Petach Tikva (IL)
PCT Filed Mar. 27, 2022, PCT No. PCT/IB2022/052786
§ 371(c)(1), (2) Date Oct. 28, 2022,
PCT Pub. No. WO2022/208271, PCT Pub. Date Oct. 6, 2022.
Claims priority of provisional application 63/167,082, filed on Mar. 28, 2021.
Prior Publication US 2024/0015420 A1, Jan. 11, 2024
Int. Cl. H04Q 11/00 (2006.01); H04J 14/02 (2006.01)
CPC H04Q 11/0005 (2013.01) [H04J 14/0267 (2013.01); H04Q 11/0003 (2013.01); H04Q 2011/002 (2013.01); H04Q 2011/005 (2013.01); H04Q 2011/0073 (2013.01); H04Q 2213/31 (2013.01)] 30 Claims
OG exemplary drawing
 
1. An optical switch comprising:
a scheduler; and
a buffer for buffering an optical packet including, arranged in a circuit, a clock generator for generating a clock signal, an optical unbalanced Mach Zehnder Interferometer (MZI) and a fiber delay line (FDL) having an FDL length,
wherein the optical packet has an optical packet signal,
wherein the scheduler is configured to insert the optical packet into the buffer and to determine a number of circulations of the optical packet through the circuit,
wherein the MZI modulates the clock signal based on the optical packet signal to create a reshaped optical packet after each circulation of the optical packet through the circuit, and
wherein the FDL introduces a delay in the optical packet proportional to the FDL length.