CPC H03M 5/145 (2013.01) [H04L 1/0009 (2013.01); H04L 1/0014 (2013.01)] | 20 Claims |
1. A transmitter comprising:
an encoder configured to
divide a first number of binary input bits of an input data signal into a first bit group and a second bit group,
generate a first intermediate bit group and a second intermediate bit group by manipulating the first bit group and the second bit group differently based on a value of the first bit group, and
generate a first symbol group by encoding the first intermediate bit group and generate a second symbol group by encoding the second intermediate bit group, each of the first symbol group and the second symbol group including a plurality of symbols, and each of the plurality of symbols having three different voltage levels; and
a driver configured to generate an output data signal by concatenating the first symbol group and the second symbol group, the driver configured to transmit the output data signal through a channel.
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