US 11,942,960 B2
ADC with precision reference power saving mode
George Pieter Reitsma, Redwood City, CA (US); Karthik Pappu, Santa Clara, CA (US); Raymond Thomas Perry, South San Francisco, CA (US); Kalin v. Lazarov, Colorado Springs, CO (US); James Raymond Catt, San Jose, CA (US); and Michael C. W. Coln, Lexington, MA (US)
Assigned to Analog Devices, Inc., Wilmington, MA (US)
Filed by Analog Devices, Inc., Wilmington, MA (US)
Filed on Jan. 31, 2022, as Appl. No. 17/588,765.
Prior Publication US 2023/0246652 A1, Aug. 3, 2023
Int. Cl. H03M 1/10 (2006.01); H03M 1/00 (2006.01)
CPC H03M 1/1014 (2013.01) [H03M 1/002 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system for processing an electrical signal, the system comprising:
analog-to-digital (ADC) signal converter circuitry including an ADC input node, an ADC output node, and an ADC reference node, the signal converter circuitry to receive an analog signal at the ADC input node and to generate, responsive to the analog signal and based on a signal received at the ADC reference node, a digital signal at the ADC output node;
bias signal circuitry to generate a reference bias;
reference standard circuitry to generate a reference standard signal; and
control circuitry to operate the system in a first mode and in a second mode, wherein:
in the first mode, the control circuitry is configured to couple the reference bias to the ADC input node and to couple the reference standard signal to the ADC reference node to generate a digital measurement of the reference bias using the reference standard signal as a reference at the ADC reference node; and
in the second mode, the control circuitry is configured to couple the analog signal to the ADC input node and the reference bias to the ADC reference node to generate a measurement of the analog signal using the reference bias as a reference at the ADC reference node.