US 11,942,930 B2
Field-effect transistor (FET) based synchronous rectifier for emulating diode
Domenico Lo Verde, Hong Kong (CN); Cesare Ronsisvalle, Hong Kong (CN); and Chi Ping Tang, Hong Kong (CN)
Assigned to Steifpower Technology Company Limited, Hong Kong (CN)
Appl. No. 17/597,322
Filed by Steifpower Technology Company Limited, Hong Kong (CN)
PCT Filed Sep. 29, 2020, PCT No. PCT/CN2020/118694
§ 371(c)(1), (2) Date Jan. 3, 2022,
PCT Pub. No. WO2021/068792, PCT Pub. Date Apr. 15, 2021.
Claims priority of application No. 19130644.8 (HK), filed on Oct. 10, 2019.
Prior Publication US 2022/0360262 A1, Nov. 10, 2022
Int. Cl. H03K 17/30 (2006.01); H01L 27/06 (2006.01)
CPC H03K 17/302 (2013.01) [H01L 27/0629 (2013.01); H03K 2017/307 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A field-effect transistor (FET) based synchronous rectifier, comprising:
a first terminal and a second terminal;
a first EFT (M1) and a second FET (M2),
wherein the second FET (M2) is adapted to control operation of the first FET (M1) to thereby allow unidirectional current flow when the two terminals are connected with an external circuit;
wherein the FET based synchronous rectifier comprises a fully integrated single-chip device adapted to emulate a diode;
wherein the first FET (M1) has at least a first gate electrode, a first source electrode and a first drain electrode; the second FET (M2) has at least a second gate electrode, a second source electrode and a second drain electrode; the second drain electrode of the second FET (M2) is in series connection with the first gate electrode of the first FET (M1);
a first diode (D1) and a first resistor (R1) connected in series between the second drain electrode of the second FET (M2) and the second terminal; and
a first capacitor (C1) connected in series between the first diode (D1) and the second source electrode of the second FET (M2),
the FET based synchronous rectifier further comprises a second resistor (R2) and a second diode (D2) connected in parallel with the first capacitor (C1) and the first diode (D1) in between the first terminal and the second terminal,
wherein the second resistor (R2) is in series connection with the second gate electrode of the second FET (M2),
wherein the second resistor (R2) is directly connected to the second terminal, and the second diode (D2) is directly connected to the first terminal.