US 11,942,911 B2
Radio-frequency power amplifier device
Kazuhiko Ohhashi, Osaka (JP); and Masatoshi Kamitani, Osaka (JP)
Assigned to NUVOTON TECHNOLOGY CORPORATION JAPAN, Kyoto (JP)
Appl. No. 18/264,548
Filed by Nuvoton Technology Corporation Japan, Kyoto (JP)
PCT Filed Feb. 17, 2022, PCT No. PCT/JP2022/006393
§ 371(c)(1), (2) Date Aug. 7, 2023,
PCT Pub. No. WO2022/176947, PCT Pub. Date Aug. 25, 2022.
Claims priority of provisional application 63/150,757, filed on Feb. 18, 2021.
Prior Publication US 2024/0039487 A1, Feb. 1, 2024
Int. Cl. H03F 1/07 (2006.01); H03F 1/02 (2006.01); H03F 1/26 (2006.01); H03F 3/24 (2006.01)
CPC H03F 3/245 (2013.01) [H03F 1/0288 (2013.01); H03F 1/26 (2013.01); H03F 2200/451 (2013.01); H03F 2203/21127 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A radio-frequency power amplifier device that is a radio-frequency power amplifier device of a hybrid type in which a carrier amplifier semiconductor device and a peak amplifier semiconductor device are disposed on a principal surface of a multilayer submount substrate, the multilayer submount substrate including a plurality of resin layers and a plurality of wiring layers, the radio-frequency power amplifier device comprising:
a bias power supply semiconductor device that outputs a carrier-amplifier bias power supply voltage to the carrier amplifier semiconductor device, and outputs a peak-amplifier bias power supply voltage to the peak amplifier semiconductor device;
radio-frequency signal wiring that is wired in a first wiring layer provided on the principal surface, and transmits a radio-frequency signal to the carrier amplifier semiconductor device or the peak amplifier semiconductor device; and
bias power supply wiring that is wired in a third wiring layer of the multilayer submount substrate, and supplies the carrier-amplifier bias power supply voltage to the carrier amplifier semiconductor device or supplies the peak-amplifier bias power supply voltage to the peak amplifier semiconductor device,
wherein the multilayer submount substrate includes an intersection portion in which, in a plan view of the multilayer submount substrate, the radio-frequency signal wiring and the bias power supply wiring intersect,
the intersection portion includes:
a shield pattern that is a portion of a second wiring layer disposed between the first wiring layer and the third wiring layer, and is set to a ground electric potential; and
a ground connection via that is disposed on each of both sides of a width of the bias power supply wiring, within a distance from the bias power supply wiring that is three times as large as the width of the bias power supply wiring in an extension direction of the bias power supply wiring, and is set to a ground electric potential.