US 11,942,859 B2
Level shifter for power applications
Gregory Szczeszynski, Hollis, NH (US)
Assigned to pSemi Corporation, LLC, San Diego, CA (US)
Filed by pSemi Corporation, San Diego, CA (US)
Filed on Jun. 26, 2020, as Appl. No. 16/914,170.
Application 16/914,170 is a continuation of application No. 16/144,072, filed on Sep. 27, 2018, granted, now 10,734,892.
Prior Publication US 2021/0050774 A1, Feb. 18, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. H02M 3/07 (2006.01); H02M 1/088 (2006.01); H02M 3/158 (2006.01); H03K 19/0185 (2006.01)
CPC H02M 3/07 (2013.01) [H02M 1/088 (2013.01); H02M 3/1584 (2013.01); H02M 3/1586 (2021.05); H03K 19/018507 (2013.01)] 30 Claims
OG exemplary drawing
 
1. A power converter having an input port and an output port, the power converter comprising:
a controller to generate one or more control signals based, at least in part, on signals within the power converter;
at least one switch to alternately transition between a conducting and a non-conducting state based, at least in part, on a gate-drive voltage to be applied to a gate of the at least one switch; and
a level shifter comprising a memory, the level shifter to facilitate the transition of the at least one switch between the conducting and the non-conducting state based, at least in part, on a particular logical value to be selected from logical values to be stored in the memory of the level shifter, the particular logical value to be selected to generate the gate-drive voltage,
wherein the level shifter comprises a first buffer on a first path and a second buffer on a second path and a multiplexer coupled to the first buffer on the first path and the second buffer on the second path, wherein at least one of the first and the second buffers buffer the particular logical value,
wherein the particular logical value to comprise a value to be derived from a fast bit along the first path or the second path.