US 11,942,565 B2
Solar cell emitter region fabrication using substrate-level ion implantation
Staffan Westerberg, Sunnyvale, CA (US); Timothy Weidman, Sunnyvale, CA (US); and David D. Smith, Campbell, CA (US)
Assigned to Maxeon Solar Pte. Ltd., Singapore (SG)
Filed by Maxeon Solar Pte. Ltd., Singapore (SG)
Filed on Sep. 15, 2020, as Appl. No. 17/021,930.
Application 17/021,930 is a continuation of application No. 14/672,071, filed on Mar. 27, 2015, abandoned.
Prior Publication US 2020/0411711 A1, Dec. 31, 2020
Prior Publication US 2022/0020894 A2, Jan. 20, 2022
Int. Cl. H01L 31/18 (2006.01); H01L 31/068 (2012.01)
CPC H01L 31/1864 (2013.01) [H01L 31/0682 (2013.01); H01L 31/1804 (2013.01); Y02E 10/547 (2013.01); Y02P 70/50 (2015.11)] 18 Claims
OG exemplary drawing
 
1. A method of fabricating a solar cell, the method comprising:
forming a lightly doped region in a semiconductor substrate by a first ion implantation, the lightly doped region of a first conductivity type of a first concentration;
forming a first plurality of dopant regions of the first conductivity type of a second, higher, concentration by a second ion implantation, the first plurality of dopant regions overlapping with a first portion of the lightly doped region;
forming a second plurality of dopant regions by a third ion implantation, the second plurality of dopant regions having a second conductivity type of a concentration higher than the first concentration, and the second plurality of dopant regions overlapping with a second portion of the lightly doped region and alternating with but not overlapping the first plurality of dopant regions;
thermally annealing the semiconductor substrate subsequent to the third ion implantation;
forming a tunneling dielectric layer on a light-receiving surface of the semiconductor substrate;
forming a doped amorphous silicon layer on the tunneling dielectric layer on the light-receiving surface of the semiconductor substrate prior to the thermally annealing the semiconductor substrate; and
crystallizing the doped amorphous silicon layer during the thermally annealing the semiconductor substrate to form a doped polycrystalline silicon layer on the light-receiving surface of the semiconductor substrate.