US 11,942,513 B2
Semiconductor structure and method of fabricating the semiconductor structure
Guan-Lin Chen, Hsinchu (TW); Kuo-Cheng Chiang, Hsinchu County (TW); Chih-Hao Wang, Hsinchu County (TW); Shi Ning Ju, Hsinchu (TW); and Jui-Chien Huang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Jan. 10, 2022, as Appl. No. 17/571,941.
Application 17/571,941 is a continuation of application No. 16/785,296, filed on Feb. 7, 2020, granted, now 11,222,948.
Claims priority of provisional application 62/907,213, filed on Sep. 27, 2019.
Prior Publication US 2022/0130958 A1, Apr. 28, 2022
Int. Cl. H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/306 (2006.01); H01L 21/3105 (2006.01); H01L 21/762 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/0673 (2013.01) [H01L 21/02532 (2013.01); H01L 21/30604 (2013.01); H01L 29/0847 (2013.01); H01L 29/1037 (2013.01); H01L 29/42392 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/02271 (2013.01); H01L 21/26513 (2013.01); H01L 21/31053 (2013.01); H01L 21/76224 (2013.01); H01L 29/1083 (2013.01); H01L 29/66545 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate having a front surface;
a first semiconductor layer proximal to the front surface;
a second semiconductor layer over the first semiconductor layer;
a gate having a portion between the first semiconductor layer and the second semiconductor layer;
a spacer between the first semiconductor layer and the second semiconductor layer, contacting the gate and the first semiconductor layer; and
a source/drain (S/D) region, wherein the S/D region is in direct contact with a bottom surface of the second semiconductor layer, wherein an interface between the spacer and the first semiconductor layer comprises:
a first section proximal to the S/D region;
a second section proximal to the gate; and
a third section between the first section and the second section,
wherein an absolute value of a derivative at the third section is greater than an absolute value of a derivative at the second section.