US 11,942,487 B2
Array substrate and display panel
Xin Zhang, Shenzhen (CN)
Assigned to TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD., Shenzhen (CN)
Appl. No. 17/281,909
Filed by TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD., Shenzhen (CN)
PCT Filed Mar. 23, 2021, PCT No. PCT/CN2021/082313
§ 371(c)(1), (2) Date Mar. 31, 2021,
PCT Pub. No. WO2022/193337, PCT Pub. Date Sep. 22, 2022.
Claims priority of application No. 202110279598.2 (CN), filed on Mar. 16, 2021.
Prior Publication US 2023/0107895 A1, Apr. 6, 2023
Int. Cl. H01L 27/12 (2006.01)
CPC H01L 27/124 (2013.01) 20 Claims
OG exemplary drawing
 
1. An array substrate, comprising a plurality of rows of pixel units, wherein
each of the pixel units is provided with a transistor area; a main transistor unit, a sub-transistor unit, and a shared transistor unit are disposed in the transistor area; and the shared transistor unit comprises a source and a drain;
each of the plurality of rows of the pixel units is provided with a shared metal wiring; and the shared metal wiring is provided above the transistor area and extends along an arrangement direction of the pixel units in a corresponding one of the plurality of rows, and is electrically connected to the source of the shared transistor unit in each of the pixel units, sequentially.