US 11,942,433 B2
Integrated circuit package and method
Chen-Hua Yu, Hsinchu (TW); Jen-Fu Liu, Hsinchu (TW); Ming Hung Tseng, Toufen Township (TW); Tsung-Hsien Chiang, Hsinchu (TW); Yen-Liang Lin, Taichung (TW); and Tzu-Sung Huang, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jan. 17, 2022, as Appl. No. 17/577,118.
Application 17/577,118 is a division of application No. 16/868,111, filed on May 6, 2020, granted, now 11,227,837.
Claims priority of provisional application 62/952,856, filed on Dec. 23, 2019.
Prior Publication US 2022/0139839 A1, May 5, 2022
Int. Cl. H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/00 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 25/00 (2006.01); H01L 25/10 (2006.01)
CPC H01L 23/5389 (2013.01) [H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/565 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 23/295 (2013.01); H01L 23/3128 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 2221/68372 (2013.01); H01L 2224/214 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/19106 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
a first integrated circuit die comprising first die connectors;
a first dielectric layer on the first die connectors;
first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors;
a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors;
a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant comprising a first molding material that extends continuously between the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous;
second conductive vias adjacent the first integrated circuit die;
a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and
a first redistribution structure comprising first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.