US 11,942,393 B2
Substrate with thermal insulation
Wei Li, Chandler, AZ (US); Edvin Cetegen, Chandler, AZ (US); Nicholas S. Haehn, Scottsdale, AZ (US); Mitul Modi, Phoenix, AZ (US); and Nicholas Neal, Gilbert, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Feb. 4, 2020, as Appl. No. 16/781,563.
Prior Publication US 2021/0242107 A1, Aug. 5, 2021
Int. Cl. H01L 23/373 (2006.01); H01L 23/00 (2006.01); H01L 23/367 (2006.01); H01L 23/522 (2006.01); H01L 23/538 (2006.01)
CPC H01L 23/3735 (2013.01) [H01L 23/367 (2013.01); H01L 23/3736 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 23/5226 (2013.01); H01L 23/5384 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/81203 (2013.01)] 16 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a substrate;
a first region of the substrate to be coupled with a die;
a second region of the substrate adjacent to the first region of the substrate, wherein the first region and the second region are separate and distinct regions and the second region has a lower thermal conductivity than the first region, and wherein the second region comprises a plurality of discrete portions; and
wherein the second region is to thermally insulate a portion of the first region when the die is coupled to the first region.