US 11,942,382 B2
Semiconductor device and method for manufacturing semiconductor element
Noritsugu Nomura, Tokyo (JP)
Assigned to Mitsubishi Electric Corporation, Tokyo (JP)
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
Filed on May 14, 2020, as Appl. No. 16/874,488.
Claims priority of application No. 2019-175083 (JP), filed on Sep. 26, 2019.
Prior Publication US 2021/0098317 A1, Apr. 1, 2021
Int. Cl. H01L 21/66 (2006.01); H01L 21/02 (2006.01); H01L 21/78 (2006.01)
CPC H01L 22/30 (2013.01) [H01L 21/02118 (2013.01); H01L 21/02282 (2013.01); H01L 21/78 (2013.01); H01L 22/14 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor substrate including:
a plurality of semiconductor elements arranged in a spreading direction of the semiconductor substrate; and
an inter-element portion between adjacent semiconductor elements among the plurality of semiconductor elements; and
a discharge inhibitor bonded not to a surface of a center of each semiconductor element among the plurality of semiconductor elements but to a surface of the inter-element portion, the discharge inhibitor being made of an insulator, wherein
a thickness of the semiconductor substrate from the surface of the inter-element portion to a bottom surface of the semiconductor substate is uniform across the entire inter-element portion.
 
4. A semiconductor device, comprising:
a semiconductor substrate including:
a plurality of semiconductor elements arranged in a spreading direction of the semiconductor substrate; and
an inter-element portion between adjacent semiconductor elements among the plurality of semiconductor elements; and
a discharge inhibitor bonded not to a surface of a center of each semiconductor element among the plurality of semiconductor elements but to a surface of the inter-element portion, the discharge inhibitor being made of an insulator, wherein
the discharge inhibitor can be peeled off from the semiconductor substrate without damaging the plurality of semiconductor elements.
 
8. A method for manufacturing a semiconductor element, comprising the steps of:
a) preparing a semiconductor substrate including: a plurality of semiconductor elements arranged in a spreading direction of the semiconductor substrate; and a dicing line between adjacent semiconductor elements among the plurality of semiconductor elements;
b) bonding a discharge inhibitor not to a surface of a center of each semiconductor element among the plurality of semiconductor elements but to a surface of the dicing line so that the discharge inhibitor is bonded to the semiconductor substrate, the discharge inhibitor being made of an insulator;
c) applying a voltage to each semiconductor element after the step b);
d) peeling off the discharge inhibitor from the semiconductor substrate after the step c); and
e) dicing the semiconductor substrate along the dicing line after the step d).