US 11,942,164 B2
Functional signal line overdrive
Michele Piccardi, Cupertino, CA (US); and Luyen Tien Vu, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Oct. 25, 2021, as Appl. No. 17/510,020.
Application 17/510,020 is a continuation of application No. 17/113,791, filed on Dec. 7, 2020, granted, now 11,158,391.
Application 17/113,791 is a continuation of application No. 16/290,398, filed on Mar. 1, 2019, granted, now 10,861,565.
Claims priority of provisional application 62/787,018, filed on Dec. 31, 2018.
Prior Publication US 2022/0044740 A1, Feb. 10, 2022
Int. Cl. G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/24 (2006.01); G11C 16/30 (2006.01); G11C 11/56 (2006.01)
CPC G11C 16/30 (2013.01) [G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/24 (2013.01); G11C 11/5621 (2013.01); G11C 11/5671 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A system comprising:
a compensation circuit configured to:
provide a number of different bias signals to each of multiple signal lines of an array of memory cells, each signal line configured to provide access to a group of memory cells of the array of memory cells, each bias signal having an overdrive voltage above a target voltage by a selected increment and an overdrive period;
determine settling times of each of the multiple signal lines to the target voltage for the number of different bias signals;
determine a functional compensation profile for the array of memory cells comprising a relationship between the different bias signals and the determined settling times across the multiple signal lines in a number of separate linear segments greater than one but less than N/2, wherein N is the number of multiple signal lines; and
store a representation of the determined functional compensation profile to compensate for variance in an electrical parameter across the signal lines of the array of memory cells.