CPC G11C 16/14 (2013.01) [G11C 16/08 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/3404 (2013.01)] | 17 Claims |
1. A method comprising:
receiving a request to perform a secure erase operation for a memory component;
determining a voltage level of a pass voltage applied to unselected wordlines of the memory component during a read operation; and
applying, by a processing device, a voltage pulse during a program operation to at least one wordline of the memory component to perform the secure erase operation, the voltage pulse exceeding the pass voltage applied to the unselected wordlines of the memory component during the read operation, wherein each memory cell of the at least one wordline is in an open state in response to an application of the voltage pulse to the at least one wordline during a subsequent read operation.
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