US 11,942,156 B2
Memory device related to performing a program operation on memory cells
Hyeok Jun Choi, Icheon-si (KR); Hee Sik Park, Icheon-si (KR); and Seung Geun Jeong, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Feb. 15, 2022, as Appl. No. 17/671,906.
Claims priority of application No. 10-2021-0070785 (KR), filed on Jun. 1, 2021; and application No. 10-2021-0169310 (KR), filed on Nov. 30, 2021.
Prior Publication US 2022/0383954 A1, Dec. 1, 2022
Int. Cl. G11C 16/10 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/10 (2013.01) [G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/3459 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a plurality of memory cells configured to store data;
a voltage generator configured to apply program voltages to a word line coupled to the plurality of memory cells during a program operation in which the plurality of memory cells are programmed to a plurality of program states;
a cell speed determiner configured to determine a program speed of the plurality of memory cells depending on a number of pulses for the program voltages applied to the word line while the program operation is being performed; and
a program manager configured to change a condition for remaining program operations depending on the program speed determined by the cell speed determiner,
wherein the program manager is configured to:
generate an operation code so that at least one of a level of each program voltage, an active time of the program voltage, a level of a step voltage for the program voltage, at least one of offsets for the program voltage that are included in the condition for the remaining program operations, and a verify voltage is controlled depending on the program speed determined by the cell speed determiner, and
transmit the operation code to the voltage generator.