US 11,942,135 B2
Deep learning accelerator and random access memory with a camera interface
Poorna Kale, Folsom, CA (US); and Jaime Cummins, Bainbridge Island, WA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Apr. 26, 2022, as Appl. No. 17/729,830.
Application 17/729,830 is a continuation of application No. 16/844,997, filed on Apr. 9, 2020, granted, now 11,355,175.
Prior Publication US 2022/0254400 A1, Aug. 11, 2022
Int. Cl. G11C 11/34 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/50 (2006.01); G06N 3/063 (2023.01); H04N 23/69 (2023.01); H04N 23/80 (2023.01)
CPC G11C 11/34 (2013.01) [G06F 9/30007 (2013.01); G06F 9/3893 (2013.01); G06F 9/5027 (2013.01); G06N 3/063 (2013.01); H04N 23/69 (2023.01); H04N 23/80 (2023.01)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
memory cells;
at least one processing unit configured to execute instructions stored in the memory cells;
a first interface configured to facilitate communications over a first connection external to the device, wherein a memory controller of a central processing unit is operable to use the first connection in providing, via the first interface, the instructions into the memory cells and retrieving, from the memory cells, results of execution of the instructions; and
a second interface configured to facilitate communications over a second connection external to the device, wherein a camera is operable to use the second connection in storing data into the memory cells as input to the execution of the instructions.