CPC G06F 9/4881 (2013.01) [G06F 9/485 (2013.01); G06F 9/52 (2013.01); G06N 3/063 (2013.01)] | 8 Claims |
1. A method for maintaining dependencies between command streams for a multicore processor comprising, at a queue processor comprising a set of command queues and a signal-wait counter matrix:
dequeuing a first wait primitive from a first waiting command queue in the set of command queues, the first wait primitive pointing to a first signaling command queue in the set of command queues;
accessing a first register in the signal-wait counter matrix, the first register storing a first number of pending signal primitives; and
in response to detecting the first number of pending signal primitives representing at least one pending signal primitive:
dequeuing a first instruction from the first waiting command queue; and
dispatching a first control signal representing the first instruction.
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