CPC G06F 9/4403 (2013.01) [G06F 2212/60 (2013.01)] | 24 Claims |
1. A hardware processor comprising:
a processor core;
a cache coupled to the processor core; and
a controller circuit to initialize a portion of the cache as memory for hardware initialization code usage before beginning execution of the hardware initialization code after a power on of the hardware processor, and provide an indication to the hardware initialization code of a start and a limit of the portion of the cache usable by the hardware initialization code.
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