US 11,941,404 B2
Processor and method for controlling the processor
Yoshiteru Hayashi, Hyogo (JP)
Assigned to PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD., Osaka (JP)
Filed by Panasonic Intellectual Property Management Co., Ltd., Osaka (JP)
Filed on Jul. 14, 2021, as Appl. No. 17/375,574.
Application 17/375,574 is a continuation of application No. PCT/JP2019/045369, filed on Nov. 20, 2019.
Claims priority of application No. 2019-039006 (JP), filed on Mar. 4, 2019.
Prior Publication US 2021/0342160 A1, Nov. 4, 2021
Int. Cl. G06F 9/38 (2018.01); G06F 9/30 (2018.01)
CPC G06F 9/3887 (2013.01) [G06F 9/3001 (2013.01); G06F 9/30032 (2013.01); G06F 9/30109 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A processor, comprising:
performing, in accordance with a single instruction, multiplication processing and comparison processing,
wherein the multiplication processing includes obtaining a multiplication result by multiplying together a first data element and a first value,
the comparison processing includes comparing the multiplication result with a second data element,
the first data element is stored in a first register,
the second data element is stored in a second register,
the first value is stored in a third register,
the processor is configured to further perform, in accordance with the single instruction, replacement processing, the replacement processing including replacing, based on a result of the comparison processing, a third data element with a second value,
the third data element is stored in a fourth register, and
the second value is further stored in the third register.