US 11,941,398 B1
Fast mapper restore for flush in processor
Brian D. Barrick, Pflugerville, TX (US); Steven J. Battle, Philadelphia, PA (US); Dung Q. Nguyen, Austin, TX (US); Susan E. Eisen, Round Rock, TX (US); Cliff Kucharski, Austin, TX (US); and Salma Ayub, Austin, TX (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Dec. 5, 2022, as Appl. No. 18/061,539.
Int. Cl. G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/48 (2006.01)
CPC G06F 9/30123 (2013.01) [G06F 9/3013 (2013.01); G06F 9/384 (2013.01); G06F 9/3861 (2013.01); G06F 9/4881 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for restoring a mapper of a processor core, the method comprising:
saving first information in a staging latch, the first information representing a newly dispatched first instruction of the processor core;
saving the first information in an entry latch of a save-and-restore buffer of the processor core; and
in response to reception of a flush command of the processor core, beginning the restoration of the mapper with the first information from the staging latch without waiting for a comparison of a flush tag of the flush command with the entry latch of the save-and-restore buffer.