US 11,941,290 B2
Managing distribution of page addresses and partition numbers in a memory sub-system
Bharani Rajendiran, Plesanton, CA (US); Jason Duong, San Jose, CA (US); Chih-Kuo Kao, Fremont, CA (US); and Fangfang Zhu, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Sep. 1, 2021, as Appl. No. 17/464,186.
Prior Publication US 2023/0066419 A1, Mar. 2, 2023
Int. Cl. G06F 3/06 (2006.01); G11C 11/4094 (2006.01); G11C 11/408 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0644 (2013.01); G06F 3/0673 (2013.01); G11C 11/4094 (2013.01); G11C 11/4085 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
receiving a memory access command to be performed on a die of the memory device, wherein the memory access command comprises a base partition number and a base page address;
determining a number of partitions associated with the die;
converting the memory access command into a plurality of commands, wherein a number of commands comprised by the plurality of commands is equal to the number of partitions associated with the die;
determining, for each command of the plurality of commands, a respective partition number derived from the base partition number;
in response to determining that a first partition number for a first command of the plurality of commands satisfies a threshold criterion, setting a second partition number for a second command of the plurality of commands to an initial value;
determining, using the base page address, a respective page address associated with each command of the plurality of commands; and
executing the plurality of commands using, for each command of the plurality of commands, the respective partition number and the respective page address.