CPC G06F 3/064 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] | 14 Claims |
1. A memory system comprising:
a memory device including a plurality of memory blocks; and
a memory controller configured to control the memory device to write data, which is stored in the memory device, to a first target memory block or a second target memory block among the plurality of memory blocks according to whether a data type of the data is a read-intensive type or a write-intensive type,
wherein the memory controller is further configured to determine the first target memory block or the second target memory block based on performance characteristics of the plurality of memory blocks, and
wherein the performance characteristic includes at least one of a read retry count, an error bit rate, and a program cycle count.
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