US 11,941,256 B2
Maintenance operations in a DRAM
Frederick A. Ware, Los Altos Hills, CA (US); Robert E. Palmer, Chapel Hill, NC (US); and John W. Poulton, Chapel Hill, NC (US)
Assigned to RAMBUS INC., San Jose, CA (US)
Filed by Rambus Inc., San Jose, CA (US)
Filed on May 31, 2022, as Appl. No. 17/829,207.
Application 17/829,207 is a continuation of application No. 16/875,881, filed on May 15, 2020, granted, now 11,507,280.
Application 16/875,881 is a continuation of application No. 16/372,336, filed on Apr. 1, 2019, granted, now 10,656,851, issued on May 19, 2020.
Application 16/372,336 is a continuation of application No. 16/145,931, filed on Sep. 28, 2018, granted, now 10,248,342, issued on Apr. 2, 2019.
Application 16/145,931 is a continuation of application No. 15/942,260, filed on Mar. 30, 2018, granted, now 10,168,933, issued on Jan. 1, 2019.
Application 15/942,260 is a continuation of application No. 15/253,736, filed on Aug. 31, 2016, granted, now 9,933,960, issued on Apr. 3, 2018.
Application 15/253,736 is a continuation of application No. 15/132,017, filed on Apr. 18, 2016, granted, now 9,437,276, issued on Sep. 6, 2016.
Application 15/132,017 is a continuation of application No. 14/937,788, filed on Nov. 10, 2015, granted, now 9,318,183, issued on Apr. 19, 2016.
Application 14/937,788 is a continuation of application No. 14/613,282, filed on Feb. 3, 2015, granted, now 9,196,348, issued on Nov. 24, 2015.
Application 14/613,282 is a continuation of application No. 13/145,542, granted, now 8,949,520, issued on Feb. 3, 2015, previously published as PCT/US2010/020934, filed on Jan. 13, 2010.
Claims priority of provisional application 61/146,612, filed on Jan. 22, 2009.
Prior Publication US 2022/0291848 A1, Sep. 15, 2022
Int. Cl. G06F 3/06 (2006.01); G06F 13/16 (2006.01); G06Q 10/00 (2023.01); G06Q 20/00 (2012.01); G11C 7/02 (2006.01); G11C 11/406 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 13/1636 (2013.01); G06F 13/1689 (2013.01); G06Q 10/00 (2013.01); G06Q 20/00 (2013.01); G11C 7/02 (2013.01); G11C 11/406 (2013.01); G11C 11/40611 (2013.01); G11C 11/40615 (2013.01); G11C 11/40618 (2013.01); G11C 2211/4061 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device comprising a dynamic random access memory (DRAM) chip that includes:
a plurality of memory banks, each bank including a plurality of rows of memory cells;
a command interface operable to receive a refresh command from a memory controller external to the DRAM chip;
refresh circuitry configured to perform one or more refresh operations to refresh data stored in at least one bank of the plurality of memory banks during a refresh time interval in response to the refresh command from the memory controller; and
control logic to configure the command interface to enter a calibration mode during the refresh time interval;
wherein the command interface is configured to perform a calibration operation in the calibration mode during the refresh time interval.