CPC G06F 12/1009 (2013.01) [G06F 12/0246 (2013.01); G06F 12/0891 (2013.01); G06F 2212/7201 (2013.01)] | 16 Claims |
1. A system comprising:
a volatile memory device;
a non-volatile memory device; and
a processing device, operatively coupled with the volatile memory device and the non-volatile memory device, to perform operations comprising:
maintaining, on the volatile memory device, a logical-to-physical (L2P) data structure comprising a plurality of L2P table entries, wherein each L2P table entry is indexed by a respective logical address and comprises a block number and a page table index associated with a physical-to-logical (P2L) data structure of a plurality of P2L data structures;
maintaining, on the volatile memory device, the plurality of P2L data structures each comprising a plurality of P2L table entries, wherein each P2L table entry of the plurality of P2L table entries comprises logical address information for a respective physical address of a plurality of physical addresses associated with the P2L data structure;
responsive to receiving a request to perform a memory access operation on a logical address of the non-volatile memory device, identifying the P2L data structure of the plurality of P2L data structures based on an entry of the L2P data structure associated with the logical address;
searching the identified P2L data structure of the plurality of P2L data structures to obtain a physical address associated with the logical address; and
translating an entry of the identified P2L data structure matching the logical address to the physical address.
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