CPC G06F 11/1024 (2013.01) [G11C 16/08 (2013.01); G11C 16/26 (2013.01)] | 20 Claims |
11. A method for controlling a memory system having a nonvolatile memory including a plurality of memory cells, the method comprising:
reading first data through application of a first read voltage to each of the memory cells;
performing a first decoding process with respect to the first data;
when the first decoding process fails, performing a tracking process by:
reading second data indicating a threshold voltage level of each of the memory cells through application of a plurality of second read voltages to each of the memory cells, the second read voltages being shifted by a predetermined amount; and
obtaining, with respect to each of the memory cells, likelihood information indicating a likelihood that the memory cell in the second threshold voltage level represents a bit value of 0 or 1 using the second data; and
performing a second decoding process with respect to the second data using the likelihood information.
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