US 11,940,866 B2
Verifying processing logic of a graphics processing unit
Donald Scorgie, Hertfordshire (GB)
Assigned to Imagination Technologies Limited, Kings Langley (GB)
Filed by Imagination Technologies Limited, Kings Langley (GB)
Filed on Jun. 28, 2022, as Appl. No. 17/852,188.
Claims priority of application No. 2109352 (GB), filed on Jun. 29, 2021.
Prior Publication US 2023/0043280 A1, Feb. 9, 2023
Int. Cl. G06F 11/07 (2006.01); G06F 9/38 (2018.01)
CPC G06F 11/0724 (2013.01) [G06F 9/3836 (2013.01); G06F 9/3877 (2013.01); G06F 11/079 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A method of verifying processing logic of a graphics processing unit, the method comprising:
receiving a test task at the graphics processing unit, the test task comprising a predefined set of instructions for execution on the graphics processing unit, the predefined set of instructions being configured to perform a predetermined set of operations on the graphics processing unit when executed for predefined input data;
in a test phase, processing the test task by executing the predefined set of instructions for the predefined input data first and second times at the graphics processing unit so as to respectively generate first and second outputs;
raising a fault signal if the first and second outputs do not match;
receiving one or more non-test tasks for processing at the graphics processing unit;
in a non-test phase, processing each of the one or more non-test tasks at the graphics processing unit a single time so as to generate a non-test output; and
for a period of time in which the test phase and the non-test phase are alternated between more than once, operating in the test phase for x % of the time, and operating in the non-test phase for (100−x) % of the time;
wherein x is adaptive in dependence on:
a rate at which fault signals are being raised; and/or
an indicated safety-criticality of the non-test tasks to be processed by the graphics processing unit in the non-test phase.