US 11,940,856 B2
Output load identification method and the apparatus incorporating the same
Xinhai Li, Guangdong (CN); Yaofeng Lin, Guangdong (CN); and Zhiwen Chen, Guangdong (CN)
Assigned to Tridonic GmbH & Co KG, Dornbirn (AT)
Appl. No. 17/625,129
Filed by Tridonic GmbH & Co KG, Dornbirn (AT)
PCT Filed Aug. 15, 2019, PCT No. PCT/CN2019/100734
§ 371(c)(1), (2) Date Jan. 6, 2022,
PCT Pub. No. WO2021/026866, PCT Pub. Date Feb. 18, 2021.
Prior Publication US 2022/0271671 A1, Aug. 25, 2022
Int. Cl. H02M 3/335 (2006.01); G06F 1/26 (2006.01); G06F 1/28 (2006.01); H02M 1/00 (2006.01); H02M 3/00 (2006.01); G01R 19/165 (2006.01); H05B 45/3725 (2020.01)
CPC G06F 1/266 (2013.01) [G06F 1/28 (2013.01); H02M 1/0009 (2021.05); H02M 1/0058 (2021.05); H02M 3/01 (2021.05); H02M 3/33507 (2013.01); H02M 3/33561 (2013.01); G01R 19/165 (2013.01); H05B 45/3725 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A power supply for providing a plurality of voltage outputs at a plurality of output ports with a function of detecting presence or absence of a load at a first output port selected from the plurality of output ports, the power supply comprising:
a first voltage source for providing a first voltage at a first node;
a first diode having a cathode coupled to the first output port, and having an anode directly or indirectly coupled to the first node for receiving the first voltage;
a second voltage source for providing a second voltage at a second node;
a second diode having a cathode coupled to a second output port selected from the plurality of output ports, and having an anode coupled to the second node for receiving the second voltage; and
a bridging circuit having two terminals respectively connected to the first and the second output ports;
wherein:
the second voltage is higher than the first voltage such that when the load is not present at the first output port, the bridging circuit pulls up an output voltage at the first output port to reverse bias the first diode, thereby enabling the presence or absence of the load at the first output port to be detectable by detecting the output voltage at the first output port.