US 11,935,928 B2
Bipolar transistor with self-aligned asymmetric spacer
Hong Yu, Clifton Park, NY (US); Jianwei Peng, Clifton Park, NY (US); and Vibhor Jain, Williston, VT (US)
Assigned to GLOBALFOUNDRIES U.S. Inc., Malta, NY (US)
Filed by GLOBALFOUNDRIES U.S. Inc., Malta, NY (US)
Filed on May 18, 2022, as Appl. No. 17/747,476.
Claims priority of provisional application 63/312,979, filed on Feb. 23, 2022.
Prior Publication US 2023/0268401 A1, Aug. 24, 2023
Int. Cl. H01L 29/417 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/737 (2006.01)
CPC H01L 29/41708 (2013.01) [H01L 29/0804 (2013.01); H01L 29/0821 (2013.01); H01L 29/1008 (2013.01); H01L 29/42304 (2013.01); H01L 29/66242 (2013.01); H01L 29/7371 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A structure comprising:
a base formed on a semiconductor substrate;
an asymmetrical spacer on the base, the asymmetrical spacer comprising a vertical sidewall directly contacting a first sidewall of the base and an L-shaped sidewall directly contacting another sidewall of the base;
an emitter on a first side of the base and separated from the base by the vertical sidewall of the asymmetrical spacer; and
a collector on a second side of the base and separated from the base by the L-shaped sidewall of the asymmetrical spacer,
wherein the asymmetrical spacer is a single spacer which surrounds the base, wherein the vertical sidewall directly contacts the first sidewall of the base and is adjacent to the emitter and the L-shaped sidewall directly contacts the other sidewall of the base and is adjacent to the collector.