US 11,935,923 B2
Lateral bipolar transistor with gated collector
Alexander Derrickson, Saratoga Springs, NY (US); Vibhor Jain, Williston, VT (US); Judson R. Holt, Ballston Lake, NY (US); Jagar Singh, Clifton Park, NY (US); and Mankyu Yang, Fishkill, NY (US)
Assigned to GLOBALFOUNDRIES U.S. Inc., Malta, NY (US)
Filed by GLOBALFOUNDRIES U.S. Inc., Malta, NY (US)
Filed on Nov. 12, 2021, as Appl. No. 17/525,256.
Claims priority of provisional application 63/236,425, filed on Aug. 24, 2021.
Prior Publication US 2023/0067486 A1, Mar. 2, 2023
Int. Cl. H01L 29/08 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/417 (2006.01); H01L 29/735 (2006.01); H01L 29/737 (2006.01)
CPC H01L 29/0821 (2013.01) [H01L 29/0649 (2013.01); H01L 29/0808 (2013.01); H01L 29/0817 (2013.01); H01L 29/1008 (2013.01); H01L 29/41708 (2013.01); H01L 29/735 (2013.01); H01L 29/737 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A structure comprising:
an extrinsic base region vertically over a semiconductor substrate and comprising asymmetrical sidewall spacers on opposing sidewalls of the extrinsic base region;
a collector region on the semiconductor substrate and separated from the extrinsic base region by at least a first spacer of the asymmetrical sidewall spacers;
an emitter region on the semiconductor substrate and separated from the extrinsic base region by a second spacer of the asymmetrical sidewall spacers;
a gate structure adjacent to the collector region; and
a sidewall spacer on the gate structure, wherein the sidewall spacer separates the gate structure from the collector region and the first spacer separates the gate structure from the extrinsic base region.