CPC G06F 9/3001 (2013.01) [G06F 7/5443 (2013.01); G06F 9/30032 (2013.01); G06F 9/30043 (2013.01)] | 20 Claims |
1. A method, comprising:
loading a first number of bits from a first array into a sequencer of a memory device, each bit of the first number of bits having a first state or a second state;
loading, from a second array in a bit-parallel manner, a second number of groups of bits into a third array, each bit of the second number of groups of bits having the first state or the second state;
multiplying each group of bits of the second number of groups of bits by each bit of the first number of bits to generate a number of scaled rows; and
summing, along associated bit positions, the number of scaled rows to generate an output row.
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