US 11,930,479 B2
PUCCH and PDSCH in multiplexed NR applications
Bishwarup Mondal, San Ramon, CA (US); Gang Xiong, Beaverton, OR (US); Alexei Davydov, Nizhny Novgorod (RU); Avik Sengupta, San Jose, CA (US); Sergey Panteleev, Nizhny Novgorod (RU); and Debdeep Chatterjee, San Jose, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Aug. 5, 2020, as Appl. No. 16/985,997.
Claims priority of provisional application 62/888,376, filed on Aug. 16, 2019.
Claims priority of provisional application 62/888,373, filed on Aug. 16, 2019.
Prior Publication US 2020/0389897 A1, Dec. 10, 2020
Int. Cl. H04W 72/0446 (2023.01); H04W 16/02 (2009.01); H04W 72/1273 (2023.01); H04W 72/23 (2023.01)
CPC H04W 72/0446 (2013.01) [H04W 16/02 (2013.01); H04W 72/1273 (2013.01); H04W 72/23 (2023.01)] 14 Claims
OG exemplary drawing
 
1. An apparatus of a 5th generation NodeB (gNB), the apparatus comprising:
processing circuitry to configure the gNB to:
transmit, to a user equipment (UE), a time-domain resource allocation list having a time-domain configuration for a physical downlink shared channel (PDSCH) allocation having a number of PDSCH transmission occasions for a slot-based repetition scheme;
transmit, to the UE, a physical downlink control channel (PDCCH) having downlink control information (DCI) that indicates a first and second Transmission Configuration Indicator (TCI) state for the PDSCH allocation, the PDSCH allocation having more than two PDSCH transmission occasions, the first TCI state applied to a first PDSCH transmission occasion of a set of PDSCH transmission occasions across consecutive slots of the PDSCH allocation and the second TCI state applied to a second PDSCH transmission occasion of the set of PDSCH transmission occasions, the PDCCH associated with a coreset pool index;
transmit, to the UE, a PDSCH in the first and second PDSCH transmission occasions;
continue to transmit, until the number of PDSCH transmission occasions is reached, the PDSCH in a sequential mapping pattern to alternate multiple first PDSCH transmission occasions in a first set of consecutive slots with multiple second PDSCH transmission occasions in a second set of consecutive slots such that the first TCI state is in the first set of consecutive slots and the second TCI state is in the second set of consecutive slots; and
receive, from the UE in response to the PDSCHs, at least one physical uplink control channel (PUCCH) containing hybrid automatic repeat request acknowledgement (HARQ-ACK) information bits having a position dependent on the coreset pool index; and
memory configured to store the DCI.