US 11,929,757 B2
Propagation delay compensation and interpolation filter
Jacques Jean Bertin, Pocatello, ID (US)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Oct. 23, 2020, as Appl. No. 16/949,281.
Application 16/949,281 is a continuation of application No. 16/820,192, filed on Mar. 16, 2020, granted, now 10,855,303.
Prior Publication US 2021/0285753 A1, Sep. 16, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. H03M 1/12 (2006.01); G01B 7/00 (2006.01); G01B 7/30 (2006.01); G01D 5/14 (2006.01); G01D 11/24 (2006.01); H03M 1/48 (2006.01)
CPC H03M 1/129 (2013.01) [G01B 7/003 (2013.01); G01B 7/30 (2013.01); G01D 5/145 (2013.01); G01D 11/245 (2013.01); H03M 1/485 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A propagation delay compensation circuit comprising:
a first circuit configured to receive a digital input comprising a measured angular position and to filter noise of the digital input then calculate a speed from a difference in time of a previous angular position and a filtered digital input comprising the measured angular position;
a second circuit configured to receive the speed, and to filter noise from the speed then calculate an acceleration from a difference in time of a previous speed and a filtered speed; and
a third circuit configured to receive the acceleration, the filtered digital input, and the filtered speed and to filter noise of the acceleration then calculate a propagation delay compensated digital output using a filtered acceleration, the filtered digital input, and the filtered speed.