CPC H03K 5/133 (2013.01) [H03K 5/1565 (2013.01); G11C 7/222 (2013.01); G11C 8/18 (2013.01)] | 29 Claims |
1. A device, comprising:
a chain of delay elements including first delay elements, second delay elements, and third delay elements;
control circuitry coupled to the chain of delay elements; and
an output node coupled to the chain of delay elements, wherein the control circuitry, in operation:
enables a number of the first delay elements;
disables a number of the third delay elements;
enables a selected number of the second delay elements, defining a period of time between two consecutive rising edges of a digital wobulated signal at the output node;
monitors an average frequency of the digitally wobulated signal; and
selectively modifies the number of enabled first delay elements and the number of disabled third delay elements based on the monitored average frequency of the digitally wobulated signal.
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