US 11,929,403 B2
Method of manufacturing semiconductor device
Masaharu Shimabayashi, Kanazawa Ishikawa (JP); and Tatsuya Shiraishi, Nonoichi Ishikawa (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed by KABUSHIKI KAISHA TOSHIBA, Tokyo (JP); and TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION, Tokyo (JP)
Filed on Sep. 10, 2021, as Appl. No. 17/471,599.
Claims priority of application No. 2020-156928 (JP), filed on Sep. 18, 2020.
Prior Publication US 2022/0093750 A1, Mar. 24, 2022
Int. Cl. H01L 29/40 (2006.01); H01L 21/28 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/401 (2013.01) [H01L 29/407 (2013.01); H01L 29/512 (2013.01); H01L 29/513 (2013.01); H01L 29/66734 (2013.01); H01L 29/7813 (2013.01); H01L 21/28194 (2013.01); H01L 21/28202 (2013.01); H01L 21/28229 (2013.01); H01L 29/518 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
forming a trench in a semiconductor layer of first conductivity type;
in the trench, forming a first layer containing silicon on an inner surface of the trench and then forming a second layer containing first oxide or nitride on the first layer, or forming the second layer on the inner surface of the trench and then forming the first layer on the second layer; and
thermally oxidizing the first layer.