CPC H01L 27/14636 (2013.01) [H01L 27/14603 (2013.01); H01L 27/14612 (2013.01); H01L 27/14634 (2013.01); H01L 27/14641 (2013.01); H01L 27/14683 (2013.01); H01L 27/1469 (2013.01); H04N 25/62 (2023.01); H04N 25/70 (2023.01); H04N 25/79 (2023.01); H01L 27/14643 (2013.01); H01L 27/14649 (2013.01); H01L 27/14689 (2013.01); H01L 29/0649 (2013.01); H01L 29/4991 (2013.01); H01L 29/515 (2013.01); H01L 29/7841 (2013.01); H04N 25/75 (2023.01); H04N 25/76 (2023.01); H10B 12/20 (2023.02)] | 12 Claims |
1. A semiconductor device, comprising:
a semiconductor substrate including an impurity region; and
a wiring layer including:
a first via connected to the impurity region;
a second via;
a first hollow region, wherein
the first hollow region is between the first via and the second via, and
the first via is not in contact with the first hollow region; and
a second hollow region, wherein the second via is between the first via and the second hollow region.
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