CPC H01L 21/76224 (2013.01) [H01L 21/0245 (2013.01); H01L 21/02502 (2013.01); H01L 21/02661 (2013.01); H01L 21/02664 (2013.01); H10B 12/34 (2023.02); H01L 21/76229 (2013.01)] | 20 Claims |
12. A method for fabricating a semiconductor device, the method comprising:
forming a trench defining an active region in a substrate;
performing a first pretreatment in which a native oxide formed on the trench is replaced with a solid salt and the solid salt is sublimated to expose a surface of the trench;
forming a first polysilicon liner over the trench;
performing a post-treatment to remove a contaminant formed on the first polysilicon liner;
performing a second pretreatment in which a native oxide formed on the first polysilicon liner is replaced with a solid salt and the solid salt is sublimated to expose a surface of the first poly silicon liner;
forming a second polysilicon liner over the first polysilicon liner; and
forming a device isolation layer filing the trench over the second polysilicon liner.
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