CPC G06F 8/441 (2013.01) [G06F 9/3001 (2013.01); G06F 9/44505 (2013.01); G06F 15/80 (2013.01)] | 20 Claims |
1. A non-transitory machine-readable medium comprising computer instructions that, in response to being executed by a processor, cause the processor to:
produce a configuration file to configure a fracturable data path of a configurable unit in an array of configurable units of a coarse-grained reconfigurable processor to generate a plurality of address sequences including a first address sequence generated using a first address calculation and a second address sequence generated using a second address calculation, the first address calculation associated with a first operation of a plurality of independent operations of the configurable unit and the second address calculation associated with a second operation of the plurality of independent operations of the configurable unit, the fracturable data path of the configurable unit comprising a plurality of computation stages respectively including a pipeline register, the configuration file produced by:
analyzing the first address calculation and the second address calculation;
assigning a first set of stages of the plurality of computation stages to the first operation to generate the first address sequence using the first set of stages based on said analysis;
assigning a second set of stages of the plurality of computation stages to the second operation to generate the second address sequence using the second set of stages based on said analysis; and
including two or more immediate values for each computation stage of the first set of stages and second set of stages in the configuration file.
|