US 11,928,339 B2
Method, system, and circuit for memory protection unit configuration and content generation
Frederic Ruelle, Marigné-Laillé (FR); and Michel Jaouen, Yvre l'Eveque (FR)
Assigned to STMicroelectronics (Grand Quest) SAS, Le Mans (FR)
Filed by STMicroelectronics (Grand Ouest) SAS, Le Mans (FR)
Filed on May 26, 2022, as Appl. No. 17/825,975.
Prior Publication US 2023/0384950 A1, Nov. 30, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/062 (2013.01) [G06F 3/0604 (2013.01); G06F 3/064 (2013.01); G06F 3/0679 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving a set of user-defined regions of a memory in which to store data on a programmable computing device;
generating a list of regions with memory access attributes based on the user-defined regions;
merging contiguous regions that share memory access attributes;
determining if interleaved contiguous regions share at least one nested attribute;
in response to determining that the interleaved contiguous regions share at least one nested attribute, defining a combined region for the interleaved contiguous regions, including at least one priority region to handle nested regions in the combined region;
in response to determining that contiguous regions fail to share memory access attributes or at least one nested attribute with at least one interleaved region, defining separate independent regions for the contiguous regions; and
generating content to configure settings of a memory protection unit for the merged contiguous regions, the combined region, and the independent regions.