US 11,928,070 B2
PCIe device
Yong Tae Jeon, Icheon (KR); Byung Cheol Kang, Icheon (KR); Seung Duk Cho, Icheon (KR); Sang Hyun Yoon, Icheon (KR); Se Hyeon Han, Icheon (KR); and Jae Young Jang, Icheon (KR)
Assigned to SK hynix Inc., Icheon (KR)
Filed by SK hynix Inc., Icheon (KR)
Filed on Oct. 20, 2021, as Appl. No. 17/506,610.
Claims priority of application No. 10-2021-0048063 (KR), filed on Apr. 13, 2021; application No. 10-2021-0048073 (KR), filed on Apr. 13, 2021; and application No. 10-2021-0048077 (KR), filed on Apr. 13, 2021.
Prior Publication US 2022/0327082 A1, Oct. 13, 2022
Int. Cl. G06F 13/42 (2006.01); G06F 1/08 (2006.01); G06F 7/58 (2006.01); G06F 13/40 (2006.01)
CPC G06F 13/4221 (2013.01) [G06F 1/08 (2013.01); G06F 7/588 (2013.01); G06F 13/4045 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A peripheral component interconnect express (PCIe) device, the PCIe device comprising:
a plurality of common functions performing operations associated with a PCIe interface according to a function type, each of the plurality of common functions being programmable to be a function type selected from a plurality function types,
wherein a common function of the plurality of common functions comprises:
an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned;
a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image;
an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information; and
an operation controller processing the data packet received from the data packet receiver based on the determination of the access allowance.