US 11,928,028 B2
Exception handler for dynamic remediation of fatal errors
Shekar Babu Suryanarayana, Bangalore (IN); and Vivek Viswanathan Iyer, Saint Johns, FL (US)
Assigned to Dell Products, L.P., Round Rock, TX (US)
Filed by Dell Products, L.P., Round Rock, TX (US)
Filed on Jul. 14, 2022, as Appl. No. 17/812,491.
Prior Publication US 2024/0020198 A1, Jan. 18, 2024
Int. Cl. G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 11/14 (2006.01)
CPC G06F 11/1417 (2013.01) [G06F 11/0778 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An Information Handling System (IHS), comprising:
a Central Processing Unit (CPU); and
a memory coupled to the CPU, the memory having program instructions stored thereon that, upon execution, cause the IHS to:
allocate memory space for a CPU Exception Service Routine (ESR) in a pre-Extensible Firmware Interface (EFI) initialization (PEI) phase;
in response to an error, call the CPU ESR; and
at least one of:
re-initialize a pre-boot network stack and transmit error data to a remote service using the pre-boot network stack; or
re-initialize a pre-boot storage stack and store the error data using the pre-boot storage stack.