US 11,928,007 B2
Monitoring processors operating in lockstep
Gajinder Panesar, Cambridge (GB); Iain Robertson, Cambridge (GB); Callum Stewart, Cambridge (GB); Hanan Moller, Cambridge (GB); and Melvin Cheah, Cambridge (GB)
Assigned to Siemens Industry Software Inc., Plano, TX (US)
Appl. No. 17/777,544
Filed by Siemens Industry Software Inc., Plano, TX (US)
PCT Filed Nov. 25, 2020, PCT No. PCT/EP2020/083426
§ 371(c)(1), (2) Date May 17, 2022,
PCT Pub. No. WO2021/105247, PCT Pub. Date Jun. 3, 2021.
Application 17/777,544 is a continuation of application No. 16/696,812, filed on Nov. 26, 2019, granted, now 11,221,901, issued on Jan. 11, 2022.
Prior Publication US 2022/0398142 A1, Dec. 15, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/07 (2006.01)
CPC G06F 11/0751 (2013.01) [G06F 11/0724 (2013.01); G06F 11/0775 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A method comprising:
observing, by an internal lockstep monitor of monitoring circuitry, states of internal signals of a master processor of system circuitry and a checker processor of the system circuitry;
comparing, by the internal lockstep monitor, corresponding observed states of the master processor and the checker processor; and
when the corresponding observed states differ:
triggering a master tracer of the monitoring circuitry to output stored master trace data recorded from an output of the master processor; and
triggering a checker tracer of the monitoring circuitry to output stored checker trace data recorded from an output of the checker processor.