CPC G01R 31/2891 (2013.01) [G01R 31/2862 (2013.01); G01R 31/2863 (2013.01); G01R 31/2865 (2013.01); G01R 31/2875 (2013.01); G01R 31/2887 (2013.01)] | 11 Claims |
1. A semiconductor test device comprising:
a chamber;
a plurality of slots arranged in the chamber;
a plurality of test boards inserted into a part of the slots to receive semiconductor devices; and
a plurality of temperature control modules inserted into another part of the slots,
wherein the temperature control modules and the test boards are alternately inserted into the slots to provide the test boards with air having a set temperature, and
each of the temperature control modules comprises:
an upper region including inflow units configured to introduce the air into the chamber;
a middle region configured to mix the air introduced by the inflow units; and
a lower region including outflow units configured to apply the mixed air to the semiconductor devices on the test board.
|